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  1 TGA4046 may 2009 ? rev - triquint semiconductor: www. tri quint.com (972)994- 8465 fax (972)994-8504 info-mmw@tqs.com 25 26 27 28 29 30 31 32 33 34 35 40 41 42 43 44 45 46 47 48 frequency (ghz) power (dbm) -30 -25 -20 -15 -10 -5 0 5 10 15 20 40 41 42 43 44 45 46 47 48 frequency (ghz) s-parameter (db) key features ? typical frequency range: 41 - 46 ghz ? typical 33dbm psat, 32dbm p1db ? 17 db nominal gain ? 16 db nominal return loss ? bias: 6 v, 2 a ? 0.15 um 3mi phemt technology ? chip dimensions 3.45 x 4.39 x 0.10 mm (0.136 x 0.173 x 0.004 in) primary applications ? sat - com measured fixtured data bias conditions: vd = 6 v, id = 2 a p1db psat product description the triquint TGA4046 is a compact high power amplifier mmic for q-band applications. the part is designed using triquint?s 0.15um gate power phemt process. the TGA4046 nominally provides 33dbm of saturated output power, and 32dbm output power at 1db gain compression from 41 - 46ghz. the mmic also provides 17db gain and 16db return loss. the part is ideally suited for markets such as satellite communications both commercial and military. the TGA4046 is 100% dc and rf tested on- wafer to ensure performance compliance. lead-free & rohs compliant. irl orl gain 2w q band high power amplifier datasheet subject to change without notice
2 TGA4046 may 2009 ? rev - triquint semiconductor: www. tri quint.com (972)994- 8465 fax (972)994-8504 info-mmw@tqs.com table i maximum ratings 1 / symbol parameter value notes vd drain voltage 6.5 v 2 / vg gate voltage range -2 to 0 v id drain current 3 a 2 / 3 / ? ig ? gate current 112 ma 3 / p in input continuous wave power 29 dbm p d power dissipation 19.5 w 2 / 4 / t ch operating channel temperature 200 c 5 / 6 / mounting temperature (30 seconds) 320 c t stg storage temperature -65 to 150 c 1 / these ratings represent the maximum operable values for this device. 2 / combinations of supply voltage, supply current, input power, and output power shall not exceed p d . 3 / total current for the entire mmic. 4 / when operated at this bias condition with a base plate temperature of 70 c, the median life is 1.9e5 hrs. 5 / junction operating temperature will directly affect the device median time to failure (tm). for maximum life, it is recommended that junction temperatures be maintained at the lowest possible levels. 6 / these ratings apply to each individual fet.
3 TGA4046 may 2009 ? rev - triquint semiconductor: www. tri quint.com (972)994- 8465 fax (972)994-8504 info-mmw@tqs.com table ii electrical characteristics (ta = 25 0 c nominal) parameter typical units frequency range 41 - 46 ghz drain voltage, vd 6.0 v drain current, id 2 a gate voltage, vg -0.6 v small signal gain, s21 17 db input return loss, s11 18 db output return loss, s22 20 db output power @ 1db gain compression, p1db 32 dbm saturated power, psat 33 dbm
4 TGA4046 may 2009 ? rev - triquint semiconductor: www. tri quint.com (972)994- 8465 fax (972)994-8504 info-mmw@tqs.com table iii thermal information parameter test conditions t ch ( c) jc ( c/w) tm (hrs) jc thermal resistance (channel to case) vd = 6 v id = 2 a pdiss = 12 w 129 4.9 6.4e+6 note: assumes eutectic attach using 1.5 mil 80/20 ausn mounted to a 20 mil cumo carrier at 70 c baseplate temperature. worst case condition with no rf applied, 100% of dc power is dissipated. median lifetime (tm) vs. channel temperature
5 TGA4046 may 2009 ? rev - triquint semiconductor: www. tri quint.com (972)994- 8465 fax (972)994-8504 info-mmw@tqs.com -30 -28 -26 -24 -22 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 35 36 37 38 39 40 41 42 43 44 45 46 47 48 frequency (ghz) return loss (db) measured data bias conditions: vd = 6 v, id = 2 a irl orl 0 2 4 6 8 10 12 14 16 18 20 22 35 36 37 38 39 40 41 42 43 44 45 46 47 48 frequency (ghz) gain (db)
6 TGA4046 may 2009 ? rev - triquint semiconductor: www. tri quint.com (972)994- 8465 fax (972)994-8504 info-mmw@tqs.com 10 12 14 16 18 20 22 24 26 28 30 32 34 36 0 2 4 6 8 10 12 14 16 18 20 22 pin (dbm) pout (dbm) & gain (db) 25 26 27 28 29 30 31 32 33 34 35 40 41 42 43 44 45 46 47 48 frequency (ghz) power (dbm) measured data bias conditions: vd = 6 v, id = 2 a psat p1db @ 45 ghz pout gain
7 TGA4046 may 2009 ? rev - triquint semiconductor: www. tri quint.com (972)994- 8465 fax (972)994-8504 info-mmw@tqs.com mechanical drawing gaas mmic devices are susceptible to damage from electrostatic discharge . proper precautions should be observed during handling, assembly and test. 1 2 3 4 5 6 7 8 9 10 0 0 0.443 (0.017) 0.868 (0.034) 2.062 (0.081) 3.300 (0.130) 3.446 (0.136) 0.105 (0.004) 2.575 (0.101) 4.281 (0.169) 3.349 (0.130) 4.386 (0.173) 1.811 (0.071) 0.095 (0.004) 0.443 (0.017) 0.868 (0.034) 2.062 (0.081) 3.300 (0.130) units: millimeters (inches) thickness: 0.100 (0.004) chip edge to bond pad dimensions are shown to center of bond pad chip size tolerance: +/- 0.051 (0.002) gnd is back side of mmic bond pad #1: bond pad #2, #4, #8, #10: bond pad #3, #9: bond pad #5, #7: bond pad #6: (rf in) (vg) (vd) (vd) (rf out) 0.114 x 0.200 (0.004 x 0.008) 0.100 x 0.100 (0.004 x 0.004) 0.150 x 0.100 (0.006 x 0.004) 0.200 x 0.120 (0.008 x 0.005) 0.105 x 0.200 (0.004 x 0.008) 1.626 1.997 2.390 2.771
8 TGA4046 may 2009 ? rev - triquint semiconductor: www. tri quint.com (972)994- 8465 fax (972)994-8504 info-mmw@tqs.com .01uf 100pf 100pf 100pf 100pf 100pf 100pf 100pf 100pf .01uf vd 4.7uf + vd vg 4.7uf + 20 ohm 4.7uf + rf in rf out recommended chip assembly diagram gaas mmic devices are susceptible to damage from electrostatic discharge . proper precautions should be observed during handling, assembly and test. bottom top top the substrates at both rf in and rf out end at the mmic with a flare (0.01 x 0.03 in) on 0.01 in thick alumina. the gate bias, vg, can be applied to pin 10 at bottom of mmic, in lieu of the long bond wire across the mmic. the large value capacitors on vd and vg ensure low frequency stability.
9 TGA4046 may 2009 ? rev - triquint semiconductor: www. tri quint.com (972)994- 8465 fax (972)994-8504 info-mmw@tqs.com recommended test setup diagram biasing setup procedures (1) recommend use conductive thermal grease underneath carrier for proper operation. also use cooli ng fan to improve heat dissipation. (2) before applying bias, set gate supply voltage to -1.5v and current limit to 4ma on each half of the amplifier, then apply the bias to gate. (3) set drain supply voltage to 1v and current limit to 1.6a on each half of the amplifier, then apply the bias to drain. (4) slowly increase the gate supply volt age and check the drai n current, if drain current slowly increases, then increase drain supply voltage slowly to 6v. (5) slowly adjust gate supply voltage to obtain a drain current of 1a quiescent on each half of the amplifier. r=20 c=15uf c=33uf vg top vg bottom vd top vd bottom gate voltage drain voltage
10 TGA4046 may 2009 ? rev - triquint semiconductor: www. tri quint.com (972)994- 8465 fax (972)994-8504 info-mmw@tqs.com assembly process notes gaas mmic devices are susceptible to damage from electrostatic discharge . proper precautions should be observed during handling, assembly and test. reflow process assembly notes: ? use ausn (80/20) solder with limited exposure to temperatures at or above 300 0 c (30 seconds max). ? an alloy station or conveyor furnace with reducing atmosphere should be used. ? no fluxes should be utilized. ? coefficient of thermal expansion matching is critical for long-term reliability. ? devices must be stored in a dry nitrogen atmosphere. component placement and adhesive attachment assembly notes: ? vacuum pencils and/or vacuum collets are the preferred method of pick up. ? air bridges must be avoided during placement. ? the force impact is critical during auto placement. ? organic attachment can be used in low-power applications. ? curing should be done in a convection oven; proper exhaust is a safety concern. ? microwave or radiant curing should not be used because of differential heating. ? coefficient of thermal expansion matching is critical. interconnect process assembly notes: ? thermosonic ball bonding is the preferred interconnect technique. ? force, time, and ultrasonics are critical parameters. ? aluminum wire should not be used. ? maximum stage temperature is 200 0 c.


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